Principal Modem PHY IP Design Verification Engineer - Terawave

Application close date:

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We are seeking aPrincipal Modem PHY IP Design Verification Engineerto lead and execute verification of advanced modem PHY IP for the Terawave program. This role is responsible for developing robust verification strategies, building scalable verification environments, and ensuring high-quality modem PHY IP delivery for next-generation wireless ASIC platforms.

The ideal candidate combines strong digital design verification skills with a solid understanding of modem PHY and DSP systems. This engineer will work closely with PHY architects, RTL designers, systems engineers, firmware, FPGA, and validation teams to verify functionality, performance, and integration of modem PHY IP across simulation, emulation, prototyping, and silicon bring-up phases.

Responsibilities

· Develop and executeverification strategy and plansfor modem PHY IP and subsystem-level integration.

· Build and maintainblock-level and subsystem-level verification environmentsfor PHY IP using industry-standard methodologies.

· Create testbenches, stimulus, checkers, scoreboards, assertions, and coverage models to verify modem PHY functionality and corner cases.

· Verify key PHY IP functions such as:

omodulation and demodulation

otiming and frequency synchronization

ochannel estimation and equalization

oMIMO / beamforming support

oFEC integration

ocontrol, configuration, and status interfaces

oimpairment handling and recovery behavior

· Collaborate with PHY algorithm and architecture teams to correlate RTL behavior against floating-point, fixed-point, or bit-accurate reference models.

· Define and trackfunctional, code, assertion, and scenario coverageto ensure verification completeness.

· Develop constrained-random and directed test strategies for feature, stress, and corner-case validation.

· Identify, debug, and root-cause design and integration issues in collaboration with RTL and architecture teams.

· Support verification of performance-sensitive designs with attention to throughput, latency, buffering, and protocol timing behavior.

· Contribute to regression automation, CI flows, and verification infrastructure improvements.

· Support subsystem integration, FPGA prototyping, emulation, and post-silicon debug as needed.

· Document verification plans, test results, coverage status, and quality metrics.

· Work effectively with internal engineering teams and external design service partners to drive verification closure.

Minimum Qualifications

· Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field.

· 10+ years of experience in digital design verification, ASIC/SoC verification, or modem/baseband verification.

· Strong experience withSystemVerilogand modern verification methodologies such asUVM.

· Experience developing verification environments for complex DSP, modem, or communications IP.

· Familiarity with one or more of the following modem PHY areas:

oOFDM and/or single-carrier systems

osynchronization

ochannel estimation and equalization

oFEC such as LDPC, Polar, Turbo, or BCH

oMIMO / beamforming

ofixed-point and quantized signal processing

· Experience with scripting and automation usingPython, Perl, shell, or similar tools.

· Strong debugging and problem-solving skills across RTL, testbench, and model correlation issues.

· Ability to work closely with design, architecture, and systems teams in a fast-paced development environment.

Preferred Qualifications

· Master’s degree in Electrical Engineering, Computer Engineering, Signal Processing, Communications, or related field.

· Experience verifying modem PHY or baseband IP for:

ommWave / sub-THz / Terahertz systems

osatellite or space communications

o5G/6G systems

ohigh-throughput wireless backhaul or mesh systems

· Experience withMATLAB, C/C++, or Python-based reference modelsfor algorithm correlation.

· Familiarity with assertions, formal verification, lint, CDC, RDC, and low-power verification methodologies.

· Experience with emulation, FPGA prototyping, and post-silicon validation/debug.

· Knowledge of RF/system impairments and their impact on modem PHY behavior, including phase noise, frequency offset, nonlinearities, and channel effects.

· Experience working with external IP vendors or design service partners.

Ability to operate effectively in an ambiguous, fast-moving development environment.

Base Pay Range for:

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.