POSTING ACTIVE · REQ-8B9D5 · FY26.Q2

Principal Technical Program Manager – DSP/Mixed-Signal ASIC Development – TeraWave

Blue Origin
[ COMPANY ]
[ LOCATION ]
[ POSTED ]
[ REQ ID ]
[ COMPENSATION RANGE · ANNUAL · BASE ]
$249,235 – $348,929USD
MIDPOINT
$299,082
SPREAD
$99,694
LEVEL
SENIOR
§ 01OVERVIEW

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! 

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.
§ 02ROLE OVERVIEW

Blue Origin seeks a program manager to lead development of theadvancedmixed-signal/DSPASIC,including Digital Beamforming (DBF).Thesehigh-performance SoCsplay a critical roleat the core ofTeraWave'ssatellite communication system. This role spans architecture definition throughtapeout, bring-up, and production. The candidate will coordinate across design, verification, physical implementation, IP integration,validation, and productionteams todeliverSOCsmanagingmultiplesignal chainsfrom bits to antennasincludingSERDES, and high-speed ADC/DAC interfaces within aggressive power and schedule targets.

§ 03KEY RESPONSIBILITIES:
  • Drive end-to-endMS/DSPSoC development from architecture freeze through production, including IPselection, design services management, andfoundryengagement.

  • Build andmaintainintegrated schedules across internal and externalcovering architecture definition, IP procurement, RTL design, verification, physical implementation, andtapeout.

  • Coordinate resolution of critical open architecture tradeson the overall signal chainincluding hybrid vs. full digital beamforming, SERDES, IF sampling strategy, ADC/DAC analog interface configuration, and element count.

  • Track and mitigate technical risks related to power budget, IP maturity (non-silicon-proven DAC), NDA/legal pipelines, and IT/CAD infrastructure readiness

  • Alignoverall DSPrequirementsincluding digital beamforming specificationsand analog/digital interface definitionsbetweenFEIC, Modem, and system-level teams to ensure coherent operation across the full phased-array signal chain

  • Manage design services partners and IP vendors including SOW execution, milestone reviews, and technical accountability.

  • Monitor critical path milestones throughtapeoutand first silicon bring-up,maintainingschedule confidence through proactive risk management.

  • Support power, area, and cost optimization trades in collaboration with design and systems engineering teams

  • Oversee thepost-silicon development phases includingbring-up, bench-validation, characterization,qualificationand production ramp.

§ 04BASIC QUALIFICATIONS:
  • Bachelor's degree in Electrical or Computer Engineering

  • 10+ years in technical program management or semiconductor development, with directmixed-signal/DSPASIC/SoC ownership

  • 5+ years leading complex digital SoC programs from architecture definition throughtapeouton advanced process nodes (7 nm or below)

  • Experience managing external design services vendors and IP licensing agreements across multi-party programs

  • Demonstratedexpertisein program planning, critical-path scheduling, and technical risk management for multi-disciplinary ASIC programs

§ 05PREFERRED QUALIFICATIONS:
  • Advanced degree in Electrical Engineering, Computer Engineering, or a related field

  • Hands-on experience with high-speed SERDES integration or high-sample-rate ADC/DAC interfaces 

  • Proficiencywith digital beamforming architectures and signal-processing pipeline design for phased-array antenna systems

  • Experience in satellite, aerospace, or space-grade ASIC programs requiring radiation/reliability features

  • Knowledge of advanced-node design flows and engagement models with approved design services providers

§ 06SECTION

Base Pay Range for:

CA applicants is $249,235.00 - $348,928.65
§ 07OTHER SITE RANGES MAY DIFFER
§ 08CULTURE STATEMENT

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

§ 09NICE TO HAVE

Base Pay Range for

CA applicants is $249,235.00 - $348,928.65

Other site ranges may differ

Culture Statement

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

[ APPLICATION ROUTE ]WORKDAY · External ATS
APPLY VIA WORKDAY

Apply links open in the employer's official ATS. Always verify recruitment messages on the company's careers page before sharing personal information.