POSTING ACTIVE · REQ-63B14 · FY26.Q2

Principal Technical Program Manager – FEIC ASIC Development – TeraWave

Blue Origin
[ COMPANY ]
[ LOCATION ]
[ POSTED ]
[ REQ ID ]
[ COMPENSATION RANGE · ANNUAL · BASE ]
$249,235 – $348,929USD
MIDPOINT
$299,082
SPREAD
$99,694
LEVEL
SENIOR
§ 01OVERVIEW

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! 

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.
§ 02ROLE OVERVIEW:

Blue Origin is seeking a Technical Program Manager to lead development of theTeraWaveFront-End Integrated Circuit (FEIC) chipset family. These chips,performing IF-to-RF conversion, low-noise and power-efficientmmwaveamplification, and LO generation,form the core building blocks ofTeraWave'smm-wave phased array implementation across both payloads and user terminals.Theyplay a decisive role in overall link performance, defining the system's mm-wave noise figure, power efficiency, resiliency, and cost structure.

This role owns the full product lifecycle—from architecture definition throughtapeoutand into production—including antenna co-development. As the key driving force behind the program, the TPM will orchestrate internal teams, external vendors, and IP providers to deliver against technical and schedule targets.

§ 03KEY RESPONSIBILITIES:
  • Drive parallel development FEICchipsetsfrom architecture definition throughtapeout,siliconbring-upandproductiononaccelerated&interleaved schedules.

  • Build andmaintainintegrated schedules across multiple design services vendors and partners, tracking inter-variant dependencies and shared design elements.

  • Coordinate closure of architecturetrades,frequencyplanningand digital control interfaceselection.

  • Track and mitigate risks related to vendorscheduleand pricingdivergences,antennadesign strategy, band emission compliance, and cross-variant design reuse targets

  • Align FEIC specifications and analog interface definitionsto ensure system-level compatibility, including analog I/O pin-map and footprint co-design

  • Manageantennaco-development, ensuring FEIC electrical specs are compatible withantennaintegrationand that end-product deliverable is aligned across stakeholders.

  • Monitor performance, power, and yield targets and drive DFT and final test strategy definition with vendors.

  • Coordinate multi-variant mask planning including metal-layer variants to minimizetapeoutrisk and cost across frequency and feature variants

  • Oversee the post-silicon development phases including bring-up, bench-validation, characterization,qualificationand production ramp.

§ 04BASIC QUALIFICATIONS:
  • Bachelor's degree in Electrical Engineering

  • 10+ years in technical program management or RF/mixed-signal semiconductor development

  • 5+ years managing RFIC or mixed-signal ASIC programs from specification throughtapeoutand silicon bring-up, including multi-variant or multi-process-node programs

  • Experience coordinating development across multiple design vendors and process technologies simultaneously, including vendor selection, SOW definition, and technical milestone management

  • Demonstratedexpertisein technical risk identification and program planning for analog/RF systems

§ 05PREFERRED QUALIFICATIONS:
  • Advanced degree in Electrical Engineering with focus on RF, microwave, or mixed-signal IC design

  • Familiarity with millimeter-wave RFIC architectures including power amplifiers, LNAs, fractional-N PLLs, and mixer design at Ka/V/E-band frequencies

  • Experience with Antenna-in-Package (AiP) co-design and RFIC packaging for phased-array applications, including pin-map, substrate, and bump/ball pitch co-optimization

  • Knowledge of RF CMOS/SOIorBiCMOSprocess technologies and their design constraints

  • Background in satellite communications, phased-array antenna systems, or space-grade RFIC qualification

§ 06SECTION

Compensation Range for:

CA applicants is $249,235.00 - $348,928.65
§ 07OTHER SITE RANGES MAY DIFFER
§ 08CULTURE STATEMENT

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

§ 09NICE TO HAVE

Compensation Range for

CA applicants is $249,235.00 - $348,928.65

Other site ranges may differ

Culture Statement

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

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