Senior Silicon Physical Design Engineer - TeraWave

Application close date:

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! 

We are seeking a Senior Silicon Physical Design Engineer to design and develop advanced integrated circuits for our revolutionary space-based communications network. The ideal candidate brings expertise in physical design methodologies, and semiconductor technologies, as well as proven ability to thrive in a fast-paced environment where innovation meets mission-critical execution.
 

 - Relocation provided

 - Travel expected up to 10% of the time

 - Interviews will include a technical assessment

 - This role is based on site in Austin, TX; San Diego, CA; the Bay Area, CA; or Renton, WA. A temporary remote work exception is approved while our Bay Area, Austin, and/or San Diego sites are being developed.

• Execute RTL-to-GDS physical implementation of SoCs for space applications: synthesis, floor-planning, power and clock distribution, place and route, and timing closure

• Drive full signoff closure: STA, physical verification (DRC/LVS/ERC), logic equivalence checking (LEC), and EM/IR analysis

• Debug timing violations and implement timing and functional ECOs

• Perform partition- and chip-level physical verification for mixed-signal designs, including analog/digital integration checks

• Develop and maintain PV runsets, signoff decks, and flow automation for repeatable top-level verification

• Contribute to physical design methodology, flow automation, and chip assembly

• Implement DFT structures and methodologies

• Collaborate with front-end and analog/mixed-signal teams to preserve design intent through implementation and signoff

• Interface with foundries on design-rule compliance, manufacturability, and yield

• Document design and verification methodologies and results

• Support post-silicon validation and debugging activities

• B.S. degree in Electrical Engineering, Computer Engineering, or related field

• 7+ years of experience in physical design of ASICs

• Experience with industry-standard EDA tools for physical design (Cadence, Synopsys, Siemens or Mentor)

• Hands-on experience across the RTL-to-GDS flow, including timing closure and power/noise analysis

• Proficiency in Python, Tcl, and Makefiles

• Signoff and closure experience: Static Timing Analysis(STA), Physical Verification (PV), Logic Equivalence Checking (LEC), and Electromigration & IR drop (EM/IR)

• Understanding of timing closure and signal integrity challenges

• Experience with power analysis and optimization techniques

• Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field

• Experience developing ASICs that meet stringent space-qualification standards for performance, reliability, and efficiency.

• Knowledge of radiation-hardened design methodologies

• Experience with advanced process nodes (16nm and below)

• Background in high-speed digital design (>1GHz)

• Experience with 3D packaging or chiplet technologies

• Understanding of thermal considerations in ASIC design

• Familiarity with space qualification requirements for electronic components

• Experience with low-power design techniques for battery or solar-powered systems

Base Pay Range for:

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.